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Joseph F Ahadian

from San Marcos, CA
Age ~50

Joseph Ahadian Phones & Addresses

  • 2195 Coast Ave, San Marcos, CA 92078 (760) 599-7178
  • 7578 Gibraltar St, Carlsbad, CA 92009 (760) 436-1214
  • 16085 Schendel Ave, Beaverton, OR 97006
  • San Diego, CA
  • Des Moines, IA
  • Somerville, MA
  • Vista, CA

Publications

Us Patents

Packaging And Assembly Method For Optical Coupling

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US Patent:
6512861, Jan 28, 2003
Filed:
Jun 26, 2001
Appl. No.:
09/892921
Inventors:
Kishore K. Chakravorty - San Jose CA
Ian A. Young - Portland OR
Joseph F. Ahadian - Beaverton OR
Johanna Marie Swan - Scottsdale AZ
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G02B 612
US Classification:
385 14
Abstract:
A package allowing both electrical and optical coupling between one or more integrated circuits and a printed circuit board (PCB) has optical waveguide structures in addition to electrical connections. An optically active device may be flip-bonded directly to an integrated circuit using solder bump technology. The integrated circuit then flip-bonded or wire-bonded to a BGA package. The package has alignment rails or balls and V-grooves to anchor the alignment rails/balls to align the BGA package to the PCB. The BGA package is bonded to the PCB using solder reflow technology.

Offset Error In Linear Feedback Loops Corrected By Loop Replication

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US Patent:
6605992, Aug 12, 2003
Filed:
Jun 5, 2001
Appl. No.:
09/876838
Inventors:
Joseph F. Ahadian - Carlsbad CA
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H03F 136
US Classification:
330 84, 330260
Abstract:
A system of connecting errors in the control loop using multiple additional loops. A first loop carries out control in a desired way, and the additional loops are provided for the purpose of determining a specified error value. That specified error value may be, for example, a quiescent current. The specified error value is then used to correct for errors in the first loop.

Flip-Chip Package Integrating Optical And Electrical Devices And Coupling To A Waveguide On A Board

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US Patent:
6754407, Jun 22, 2004
Filed:
May 30, 2002
Appl. No.:
10/158250
Inventors:
Kishore K. Chakravorty - San Jose CA
Johanna Swan - Scottsdale AZ
Brandon C. Barnett - Beaverton OR
Joseph F. Ahadian - Carlsbad CA
Thomas P. Thomas - Beaverton OR
Ian Young - Portland OR
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G02B 612
US Classification:
385 14, 385 32
Abstract:
A package allowing both electrical and optical coupling between one or more integrated circuits and a printed circuit board (PCB) has an optical waveguide structures in addition to electrical connections. An optically active device is flip-chip bonded directly to an integrated circuit using solder bump technology. The optically active device has a lens attached to it to facilitate optical coupling to the optical waveguide. The integrated circuit is flip-chip bonded to a Ball Grid Array (BGA) package. The BGA package is bonded to the PCB using solder reflow technology.

Feedback Loop For Lc Vco

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US Patent:
7026883, Apr 11, 2006
Filed:
Mar 12, 2004
Appl. No.:
10/801395
Inventors:
Harish Muthali - Portland OR,
Ian Young - Portland OR,
Joseph F. Ahadian - Carlsbad CA,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H03B 5/04
US Classification:
331183, 331109, 331117 R
Abstract:
A voltage-controlled oscillator includes an inductor capacitor (LC) tank; a drive circuit having a current source; and a feedback loop circuit. The feedback loop includes a peak detect circuit to generate a peak detect voltage; a reference voltage generator to generate a single reference voltage; and an operational amplifier, coupled to the peak detect circuit and the reference voltage generator, to generate an analog bias signal to adjust a current of the current source.

Flip-Chip Package Integrating Optical And Electrical Devices And Coupling To A Waveguide On A Board

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US Patent:
7049704, May 23, 2006
Filed:
May 6, 2004
Appl. No.:
10/840017
Inventors:
Kishore K. Chakravorty - San Jose CA,
Johanna Swan - Scottsdale AZ,
Brandon C. Barnett - Beaverton OR,
Joseph F. Ahadian - Carlsbad CA,
Thomas P. Thomas - Beaverton OR,
Ian Young - Portland OR,
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
H01L 29/40
US Classification:
257778, 257737
Abstract:
A package allowing both electrical and optical coupling between one or more integrated circuits and a printed circuit board (PCB) has an optical waveguide structure in addition to electrical connections. An optically active device is flip-chip bonded directly to an integrated circuit using solder bump technology. The optically active device has a lens directly attached to it to facilitate optical coupling to the optical waveguide. The integrated circuit is flip-chip bonded to a Ball Grid Array (BGA) package. The BGA package is bonded to the PCB using solder reflow technology.

Optoelectrical Package

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US Patent:
7418163, Aug 26, 2008
Filed:
Mar 28, 2002
Appl. No.:
10/109313
Inventors:
Kishore K. Chakravorty - San Jose CA,
Joseph F. Ahadian - Carlsbad CA,
Johanna Swan - Scottsdale AZ,
Thomas P. Thomas - Beaverton OR,
Brandon C. Barnett - Beaverton OR,
Ian Young - Portland OR,
International Classification:
G02B 6/12
US Classification:
385 14, 385129, 385130
Abstract:
An integrated optoelectrical package for optoelectrical integrated circuits (ICs) is disclosed. The package includes a package substrate having contact receiving members on an upper surface. The contact receiving members are electrically connected to contacts on the lower surface. An optoelectronic receiver package and an optoelectronic transmitter package are each electrically mounted to respective first and second subsets of the contact receiving members. Input and output waveguide arrays are formed atop the substrate package and are optically coupled to the optoelectronic receiver package and the optoelectronic transmitter package, respectively. The contacts on the lower surface of the package substrate are designed to contact and engage the contact receiving members of a standard printed circuit board (PCB).

Biasing Methods And Devices For Power Amplifiers

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US Patent:
8111104, Feb 7, 2012
Filed:
Jan 25, 2010
Appl. No.:
12/657727
Inventors:
Joseph F. Ahadian - San Marcos CA,
Vikas Sharma - Elgin IL,
Neil Calanca - Crown Point IN,
Jaroslaw E. Adamski - Streamwood IL,
Assignee:
Peregrine Semiconductor Corporation - San Diego CA
International Classification:
H03G 3/30
US Classification:
330290, 330311
Abstract:
Biasing methods and devices for power amplifiers are described. The described methods and devices use the power amplifier output voltage to generate bias voltages. The bias voltages are obtained using rectifiers and voltage dividers. The described biasing methods and devices can be used with class-E power amplifiers.

Fiber Optic Bi-Directional Coupling Lens

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US Patent:
8335411, Dec 18, 2012
Filed:
Nov 12, 2009
Appl. No.:
12/617021
Inventors:
Charles B. Kuznia - Encinitas CA,
Joseph F. Ahadian - San Marcos CA,
Richard T. Hagan - Mission Viejo CA,
Richard J. Pommer - Carlsbad CA,
Assignee:
Ultra Communications, Inc. - Vista CA
International Classification:
G02B 6/32
G02B 6/12
G02B 6/26
G02B 6/42
US Classification:
385 33, 385 14, 385 47
Abstract:
A component for coupling light bi-directionally between optical waveguides and optoelectronic devices is described. This component can be inexpensively manufactured and fits within the existing form-factor of fiber optic transceivers or transmitters, and has features for efficiently coupling laser light to a waveguide and light from the same waveguide to a detector. The described components can be formed as an array to operate within system that operation over parallel optical fibers. Applicability for these components is for optical time domain reflectometry, bi-directional optical communications, remote fiber sensing, and optical range finders.
Joseph F Ahadian from San Marcos, CA, age ~50 Get Report